The present invention relates generally to the fabrication of semiconductor integrated circuits (IC""s), and more particularly to the fabrication of memory IC""s.
Semiconductor devices are used in a variety of electronic applications, such as personal computers and cellular phones, for example. The semiconductor industry in general is being driven to decrease the size of semiconductor devices located on integrated circuits. Miniaturization is generally needed to accommodate the increasing density of circuits necessary for today""s semiconductor products.
One semiconductor product widely used in electronic systems for storing data is a semiconductor memory device, and a common type of semiconductor memory device is a dynamic random access memory (DRAM). A DRAM typically includes millions or billions of individual DRAM cells arranged in an array, with each cell storing one bit of data. A DRAM memory cell typically includes an access field effect transistor (FET) and a storage capacitor. The access FET allows the transfer of data charges to and from the storage capacitor during reading and writing operations. In addition, the data charges on the storage capacitor are periodically refreshed during a refresh operation.
More recent DRAM designs involve manufacturing storage capacitors that comprise deep trenches and an overlying transistor disposed over the deep trench storage cells formed in a subsequent layer. This type of DRAM structure is referred to as a vertical DRAM.
An interim structure often used in the formation of deep trench storage cells is a sacrificial collar. A sacrificial collar comprises a thin insulating collar layer formed at the top of DRAM trench that is left remaining during trench processing, for example, during bottle etch and doping of the semiconductor substrate within the deep trench. The sacrificial collar is removed prior to the completion of the semiconductor memory device, and is replaced by a permanent collar after the deep trench processing is completed.
Formation of sacrificial collars results in the ability to easily perform processing steps in the trench before a thick oxide layer or permanent collar around the top part of a trench is formed. The permanent thick collar is required to electrically isolate memory cells from one another, and serves to reduce parasitic vertical transistor action in the finished device.
With the trend towards decreasing the size of semiconductor components, manufacturing sacrificial collars in deep trenches having high aspect ratios proves challenging.
Embodiments of the present invention achieve technical advantages as a process flow for a sacrificial collar scheme for a trench in a semiconductor device, such as a DRAM. The process flow presented here ensures that there is a void in the sacrificial semiconductor material deposited in each trench of a wafer when the sacrificial collar is formed, making it easier to remove. the sacrificial semiconductor material. A semiconductor material layer is deposited on the sidewalls of the trenches, and a semiconductor material plug is formed at the top of the semiconductor material layer to leave a void in the bottom of the trenches.
In one embodiment, disclosed is a method of manufacturing a semiconductor device, comprising providing a semiconductor substrate, and forming a plurality of trenches in the substrate. The method includes forming at least a first insulating layer over the substrate along the trench sidewalls, and forming a semiconductor material layer over the first insulating layer along the trench sidewalls. The method includes recessing the semiconductor material layer to a predetermined height below the substrate top surface, forming a semiconductor material plug at the top surface of the recessed semiconductor material layer, leaving a void in the bottom of each trench, and depositing a second insulating layer over the first insulating layer and over the semiconductor material layer and plug within the trenches. The second insulating layer is removed from the top surface of the substrate and the horizontal top surface of the semiconductor material plug, leaving portions of the second insulating layer at the sidewall in the top area of the trenches. The semiconductor material plug is removed, and the semiconductor material layer is removed from within the trenches.
In another embodiment, disclosed is a method of forming a sacrificial collar in a semiconductor device having a plurality of trenches formed in a substrate, the trenches having sidewalls, the method comprising forming a first nitride layer on the trench sidewalls, and forming a semiconductor material layer over the first nitride layer at least along the trench sidewalls. The method includes recessing the semiconductor material layer to a predetermined depth below the substrate surface, forming a semiconductor material plug at the top surface of the recessed semiconductor material layer, leaving a void in the bottom of each trench, and depositing a first oxide layer over the first nitride layer, the recessed semiconductor material layer and semiconductor material plug. The method includes depositing a second nitride layer over the first oxide layer, and removing the first oxide layer and second nitride layer from the top surface of the substrate and the top surface of the semiconductor material plug, leaving portions of the first oxide layer and second nitride layer at the top of the trenches along the sidewalls. The semiconductor material plug and the semiconductor material layer are removed from within the trenches.
Advantages of embodiments of the invention include providing a thin semiconductor material layer that is easy to remove from a trench of a semiconductor wafer. A shorter etch process may be used to remove the semiconductor material layer than prior art etch processes that were required to remove semiconductor material from the entire trench. Over-etching of the wafer is prevented, with the use of the shorter etch process required to remove the semiconductor material layer. Furthermore, the recess depth of the collar is more precisely controllable than in prior art processes.